Making Sense Of PUFs
SRAM PUF architecture. | Download Scientific Diagram
A new read–write collision-based SRAM PUF implemented on Xilinx FPGAs | SpringerLink
Template for producing VLSI Symposia proceedings
Figure 2 from Design of SRAM PUF with improved uniformity and reliability utilizing device aging effect | Semantic Scholar
Basics of SRAM PUF and how to deploy it for IoT security - Embedded.com
Graduation Project: IoT Device Authentication Based on SRAM-PUF Technology | ICT Lab
a) Queried by a challenge, the PUF produces an instance-specific... | Download Scientific Diagram
Basics of SRAM PUF and how to deploy it for IoT security - Embedded.com
Physical Unclonable Functions for Cryptographic Key Generation
Memory based CMOS PUFs: (a) SRAM PUF, (b) latch PUF, and (c) butterfly PUF. | Download Scientific Diagram
Protecting a Device's Root Secrets with SRAM PUF" - An Intrinsic ID Whiteboard Video - YouTube
SRAM PUF - Intrinsic ID | Home of PUF Technology
Implementación de la clave de PUF y seguridad TrustZone | DigiKey
SRAM PUF: The Secure Silicon Fingerprint
Study on Error Correcting Code Applied to SRAM-PUF
Electronics | Free Full-Text | SRAM-Based PUF Reliability Prediction Using Cell-Imbalance Characterization in the State Space Diagram | HTML
Evaluation of SRAM PUF Characteristics and Generation of Stable Bits for IoT Security | SpringerLink
Security of PUFs: Lessons Learned after Two Decades of Research
Intrinsic ID Optimizes SRAM PUF Security Technology for Advanced Process Nodes with QuiddiKey 4.x
Graduation Project: IoT Device Authentication Based on SRAM-PUF Technology | ICT Lab
